Design reuse through high-level library mapping

We present high-level library mapping (HLLM), a technique that permits reuse of complex databook components (specifically ALUs) in architectural synthesis. We describe a dynamic programming formulation of HLLM, demonstrate the versatility of our approach on a variety of libraries and compare HLLM for ALUs with the traditional logic-synthesis approach. Our experiments show that HLLM for ALUs outperforms logic-synthesis in area, delay and runtime, indicating that HLLM is a promising approach for reuse of datapath components in architectural synthesis