Title :
GARDA: a diagnostic ATPG for large synchronous sequential circuits
Author :
Corno, F. ; Prinetto, P. ; Rebaudengo, M. ; Reorda, M. Sonza
Author_Institution :
Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
Abstract :
The paper deals with automated generation of diagnostic test sequences for synchronous sequential circuits. An algorithm is proposed, named GARDA, which is suitable to produce good results with acceptable CPU time and memory requirements even for the largest benchmark circuits. The algorithm is based on Genetic Algorithms, and experimental results are provided which demonstrate the effectiveness of the approach
Keywords :
VLSI; automatic testing; fault diagnosis; genetic algorithms; integrated circuit testing; logic testing; sequential circuits; CPU time; GARDA; benchmark circuits; diagnostic ATPG; diagnostic test sequences; genetic algorithms; memory requirements; synchronous sequential circuits; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Fault diagnosis; Genetic algorithms; Partitioning algorithms; Sequential analysis; Sequential circuits; Test pattern generators;
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
DOI :
10.1109/EDTC.1995.470385
