Title :
Eigen-signatures for regularity-based IDDQ testing
Author_Institution :
S&S Archit. Center, Sony Corp., Tokyo, Japan
Abstract :
Researchers and test engineers challenge IDDQ testing on deep submicron (DSM) devices. We have proposed to test devices with high IDDQ currents at normal operating conditions based on exploiting the regularity of defect-free IDDQ signatures, the IDDQ responses of a circuit on a test vector set. This paper demonstrates the fundamental characteristics of the regularity and proposes a new methodology based on eigen-signatures. Eigen-signatures are unique signatures transformed from IDDQ signatures. The analysis of five eigen-signatures, including enhanced "Delta IDDQ" and "Current Ratios," on a product indicates that: the IDDQ values related to a test vector set have a small variation, whereas, the IDDQ magnitudes have a large variation; and the defect current prediction error of methods focusing the changes between the test vectors is 23 times smaller than the error of methods focusing the IDDQ magnitudes.
Keywords :
CMOS digital integrated circuits; VLSI; electric current measurement; integrated circuit testing; CMOS devices; DECOUPLE; Delta IDDQ; IDDQ testing; current ratios; deep submicron devices; eigen-signatures; regularity; test vector set; Circuit testing; Electrical capacitance tomography; Electronic mail; Performance evaluation; Shape; System testing;
Conference_Titel :
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN :
0-7695-1570-3
DOI :
10.1109/VTS.2002.1011155