DocumentCode :
1821992
Title :
Elimination of multi-cycle false paths by state encoding
Author :
Hasan, Zafar ; Ciesielski, Maciej J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear :
1995
fDate :
6-9 Mar 1995
Firstpage :
155
Lastpage :
159
Abstract :
In this paper we present a technique to remove multi-cycle false paths from a sequential circuit by the encoding of its states. Based on behavioral level analysis, we derive the necessary and sufficient condition for the encoding of FSM to obtain a false path free implementation. This condition requires the satisfaction of false path dichotomies obtained from symbolic output and next state equations of the machine. The presented approach can significantly impact the multi-cycle false path removal techniques, traditionally applied to gate-level circuits
Keywords :
encoding; finite state machines; logic design; sequential circuits; sequential switching; FSM encoding; behavioral level analysis; multi-cycle false paths elimination; sequential circuit synthesis; state encoding; Circuit testing; Clocks; Combinational circuits; Delay; Encoding; Equations; Logic circuits; Performance analysis; Sequential circuits; Sufficient conditions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
Type :
conf
DOI :
10.1109/EDTC.1995.470404
Filename :
470404
Link To Document :
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