DocumentCode :
1822268
Title :
Improved technology mapping using a new approach to Boolean matching
Author :
Kapoor, Bhanu
Author_Institution :
Integrated Syst. Lab., Texas Instrum. Inc., Dallas, TX, USA
fYear :
1995
fDate :
6-9 Mar 1995
Firstpage :
86
Lastpage :
90
Abstract :
We present an improved method for technology mapping using a new approach to the Boolean matching problem. Signatures computed over OBDDs using a set of specific probability values determine matches between library cells and portions of the netlist. Unlike some previous methods, which may require creation of up to O(n!) OBDDs for all possible permutations of module´s inputs, our method requires exactly one OBDD to be created for the portion of the netlist being matched. Some results obtained on ISCAS85 benchmark circuits suggest the viability and validity of our approach
Keywords :
Boolean functions; circuit optimisation; combinational circuits; logic CAD; probability; Boolean matching; ISCAS85 benchmark circuits; OBDDs; combinational circuits; computer-aided synthesis; library cells; logic synthesis; specific probability values; technology mapping; Boolean functions; Circuit synthesis; Data structures; Equations; Instruments; Laboratories; Libraries; Logic circuits; Logic design; Space technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
Type :
conf
DOI :
10.1109/EDTC.1995.470415
Filename :
470415
Link To Document :
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