DocumentCode
1823044
Title
Upper bounds on the state complexity of trellis diagrams for turbo codes
Author
Okamura, Tos Hihi ko
Author_Institution
C&C Media Res. Labs., NEC Corp., Kawasaki, Japan
Volume
5
fYear
1999
fDate
1999
Firstpage
2571
Abstract
Upper bounds on the state complexity of minimal trellises for turbo codes are reported. State complexity depends on a permutation of bit positions, and three specific types of bit orders are considered. One is the standard order. The other two are known to result in a very low complexity when the interleaver in the encoder is a block interleaver. This tendency may be explained on the basis of the fact that the upper bounds for these two types of bit orders will be very small when the interleaver is a block type. Two newly defined interleaver parameters are used here to describe the upper bounds.
Keywords
block codes; computational complexity; interleaved codes; linear codes; state-space methods; trellis codes; turbo codes; bit orders; bit positions permutation; block interleaver; encoder; linear block codes; minimal trellises; state complexity; trellis diagrams; turbo codes; upper bounds; Block codes; Decoding; Laboratories; Linear code; National electric code; Random variables; State-space methods; Turbo codes; Upper bound;
fLanguage
English
Publisher
ieee
Conference_Titel
Global Telecommunications Conference, 1999. GLOBECOM '99
Print_ISBN
0-7803-5796-5
Type
conf
DOI
10.1109/GLOCOM.1999.831765
Filename
831765
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