DocumentCode
1823279
Title
A CDM robust 5V distributed ESD clamp network leveraging both active MOS and lateral NPN conduction
Author
Ruth, Scott ; Stockinger, Michael ; Miller, James W. ; Whitney, Vincent ; Kearney, Mark ; Ngo, Sean
Author_Institution
Freescale Semicond., Austin, TX, USA
fYear
2011
fDate
11-16 Sept. 2011
Firstpage
1
Lastpage
9
Abstract
In this work we present a hybrid 5V distributed ESD clamp network leveraging both active MOS and lateral NPN conduction in the rail clamp NMOS during CDM. The design is optimized by SPICE simulations and verified by CDM test data of an I/O test ring and a full product.
Keywords
MOSFET; SPICE; electrostatic discharge; protection; semiconductor device models; CDM test data; I-O test ring; SPICE simulations; active MOS; clamp design methodology; distributed ESD clamp network; hybrid 5V distributed ESD clamp network; lateral NPN conduction; rail clamp NMOS; voltage 5 V; Clamps; Electrostatic discharge; Fingers; Layout; Logic gates; MOS devices; Semiconductor diodes;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2011 33rd
Conference_Location
Anaheim, CA
ISSN
Pending
Electronic_ISBN
Pending
Type
conf
Filename
6045563
Link To Document