DocumentCode
1823799
Title
Active clamp implementation in complementary BiCMOS process with high voltage BJT devices
Author
Vashchenko, Vladislav ; Shibkov, Andrei
Author_Institution
Nat. Semicond. Corp., Sunnyvale, CA, USA
fYear
2011
fDate
11-16 Sept. 2011
Firstpage
1
Lastpage
7
Abstract
A small footprint active clamp design with low voltage CMOS and high voltage BJT components in complementary BiCMOS process is proposed, analyzed by mixed-mode simulation and experimentally validated. The new clamp is composed from stacked NMOS driver and power BJT to achieve appropriate voltage tolerance. Both NPN and PNP-based versions of the clamp are compared to the stacked NMOS clamp.
Keywords
BiCMOS integrated circuits; active networks; bipolar transistors; driver circuits; electrostatic discharge; active clamp implementation; complementary BiCMOS process; high voltage BJT devices; low voltage CMOS; mixed mode simulation; power BJT; small footprint active clamp design; stacked NMOS driver; Arrays; BiCMOS integrated circuits; CMOS integrated circuits; Clamps; Electrostatic discharge; Integrated circuit modeling; MOS devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2011 33rd
Conference_Location
Anaheim, CA
ISSN
Pending
Electronic_ISBN
Pending
Type
conf
Filename
6045582
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