Title :
The impact of electrical overstress on the design, handling and application of integrated circuits
Author :
Kaschani, K.T. ; Gärtner, R.
Author_Institution :
Texas Instrum., Freising, Germany
Abstract :
Common misconceptions regarding the characteristics of ICs and electrical overstress (EOS) are summarized, analyzed and clarified. In order to avoid EOS fails right from the beginning of the design process, a methodology is developed to deal with EOS in the design, handling and application of ICs.
Keywords :
integrated circuit design; EOS; IC design; IC handling; electrical overstress; integrated circuit design; integrated circuit handling; semiconductor devices; Current measurement; Earth Observing System; Electromagnetic interference; Electrostatic discharge; Integrated circuits; Stress; Transient analysis;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2011 33rd
Conference_Location :
Anaheim, CA
Electronic_ISBN :
Pending
