DocumentCode
1824305
Title
A study of a measurement and simulation method on ESD noise causing soft-errors by disturbing signals
Author
Lee, Jongsung ; Lim, Jaedeok ; Jo, Cheolgu ; Seol, Byongsu ; Nandy, Argha ; Li, Tianqi ; Pommerenke, David
Author_Institution
Samsung Electron. Co., Ltd., Suwon, South Korea
fYear
2011
fDate
11-16 Sept. 2011
Firstpage
1
Lastpage
5
Abstract
A methodology to measure and simulate ESD induced noise on active IC Pins is introduced. A simple experimental setup injects ESD noise from an ESD generator and captures the waveforms. Secondly, the waveforms are simulated using a combination of 3D simulation and SPICE modeling.
Keywords
SPICE; electric noise measurement; electrostatic discharge; integrated circuit noise; 3D simulation; ESD generator; ESD induced noise measurement; ESD induced noise simulation; SPICE modeling; active IC pin; signal disturbance; soft-error; Electrostatic discharge; Generators; Integrated circuit modeling; Noise; Numerical models; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2011 33rd
Conference_Location
Anaheim, CA
ISSN
Pending
Electronic_ISBN
Pending
Type
conf
Filename
6045600
Link To Document