Design for testability of a modular, mixed signal family of VLSI devices

Author

Flaherty, Ed ; Allan, Andrew ; Morris, John

Author_Institution

Texas Instrum. Inc., Stafford, TX, USA

fYear

1993

fDate

17-21 Oct 1993

Firstpage

797

Lastpage

804

Abstract

Recent advances in semiconductor design and fabrication have made it possible to integrate an entire system including digital microcontrollers, memories, analog and power devices onto a single silicon chip. The complexity of test has increased greatly due to the embedded nature of these devices and also the significant economic pressure to maximize the number of analog/power pins and minimize test access pins. This paper describes the application of previously developed DFT techniques to a configurable family of highly integrated mixed signal devices and the strategy for achieving modular re-usable tests for mixed signal automatic test equipment

Keywords

VLSI; automatic test equipment; automatic testing; design for testability; electronic equipment testing; integrated circuit testing; mixed analogue-digital integrated circuits; modules; DFT; Prism; Si chip; VLSI devices; digital microcontrollers; economics; memories; mixed signal automatic test equipment; modular mixed signal set; power devices; semiconductor design; test access pins; testability; Automatic test equipment; Automatic testing; Design for testability; Fabrication; Microcontrollers; Pins; Power generation economics; Power system economics; Silicon; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1993. Proceedings., International

Conference_Location

Baltimore, MD

Print_ISBN

0-7803-1430-1

Type

conf

DOI

10.1109/TEST.1993.470622

Filename

470622