Title :
Test features of the HP PA7100LC processor
Author :
Josephson, Don D. ; Dixon, Daniel J. ; Arnold, Barry J.
Author_Institution :
Hewlett Packard Co., Ft. Collins, CO, USA
Abstract :
The implementation of an 1149.1 compliant test controller for a low cost, high performance CMOS RISC processor is described. The controller includes features to support IDDQ test, internal test, a hardware assisted instruction buffer test, and at speed internal state capture
Keywords :
CMOS integrated circuits; Hewlett Packard computers; IEEE standards; boundary scan testing; computer architecture; electric current measurement; logic testing; microcontrollers; microprocessor chips; reduced instruction set computing; 1149.1 compliant test controller; CMOS RISC processor; HP PA7100LC processor; IDDQ test; hardware assisted instruction buffer test; internal test; Central Processing Unit; Circuit testing; Clocks; Costs; Laboratories; Logic design; Logic testing; Manufacturing; System testing; Systems engineering and theory;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470626
