Title :
CHEETA: Composition of hierarchical sequential tests using ATKET
Author :
Vishakantaiah, Praveen ; Abraham, Jacob A. ; Saab, Daniel G.
Author_Institution :
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
Abstract :
An approach to modular and hierarchical sequential circuit test generation, which exploits a top-down design methodology, uses high level test knowledge and constraint driven module test generation to target faults at the structural level, is introduced in this paper. Results obtained for several designs are provided to demonstrate the effectiveness of our approach and the need for high level knowledge along with global constraints while deriving sequential circuit tests
Keywords :
automatic testing; design for testability; fault diagnosis; integrated circuit testing; logic testing; sequential circuits; AM2910; ATKET; CHEETA; MTC100; VLSI; constraint driven module test generation; global constraints; hierarchical sequential circuit test generation; hierarchical sequential tests; high level test knowledge; top-down design; Automatic testing; Circuit faults; Circuit testing; Design methodology; Jacobian matrices; Logic testing; Sequential analysis; Sequential circuits; Switches; Test pattern generators;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470643
