Title :
Dos and Don´ts in computing fault coverage
Author :
Abramovici, Miron
Author_Institution :
AT&T Bell Lab., Naperville, IL, USA
Abstract :
High fault coverage for single stuck faults (SSFs) is a necessary (but not sufficient) condition to achieve high defect coverage. The defect coverage of the manufacturing test is the main factor determining the quality of the products shipped to customers. Since the fault coverage for SSFs is a basic concept in testing, it should have a clear, well-understood, and universally accepted meaning. How can it be otherwise, when a minimum fault coverage is one of the requirements imposed on a design, when vendors make so many claims regarding the fault coverage obtained with their tools, when we apply DFT techniques to improve the fault coverage, and when almost every paper reports some fault coverage figures? In reality, there are several ways of computing the fault coverage, and their results may differ greatly. This position paper provides a critical analysis of the different fault coverage measures used in practice
Keywords :
automatic testing; design for testability; fault location; logic testing; production testing; DFT; computing fault coverage; critical analysis; defect coverage; detectable fault coverage; manufacturing test; single stuck faults; Automatic test pattern generation; Circuit faults; Circuit testing; Combinational circuits; Digital-to-frequency converters; Electrical fault detection; Fault detection; Redundancy; Sequential circuits; System testing;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470648