• DocumentCode
    1826504
  • Title

    Improve Indirect Branch Prediction with Private Cache in Dynamic Binary Translation

  • Author

    Yin, Liao ; Haitao, Jiang ; Guangzhong, Sun ; Guojie, Jin ; Guoliang, Chen

  • Author_Institution
    Sch. of Comput. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
  • fYear
    2012
  • fDate
    25-27 June 2012
  • Firstpage
    280
  • Lastpage
    286
  • Abstract
    Dynamic binary translation (DBT) is a just-in-time technology of compiler. It is used to support the binary translation, dynamic optimization, program instrumentation, virtualization and so on. How to improve performance is the core research issues about dynamic binary translation technology. Many researches show that how to handle the indirect branch instruction has a key impact about the performance of DBT. Some methods are proposed to handle the indirect branch. But there are some limitations for these methods. This paper analyzes the locality of target address of the indirect branch. The experiment indicates that there is a well locality about the distribution of target address. To make use of this feature, we propose a novel algorithm to quickly predict the target address for indirect branch. For a given indirect branch, we add a private buffer to cache its all previous target address. When translator meets an indirect branch, it predicts the target address from the private buffer firstly. This way increases the predication hit rate of the target address for indirect branch and reduce the number of context switching in a DBT system. It also effectively improves the whole performance for the dynamic binary translation technology.
  • Keywords
    cache storage; program compilers; DBT system; compilers; context switching; dynamic binary translation; hit rate prediction; indirect branch instruction prediction improvement; just-in-time technology; private buffer; private cache; target address locality analyzes; Context; Heuristic algorithms; Indexes; Prediction algorithms; Radiation detectors; Switches; binary translation; indirect branch; locality; private cache;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
  • Conference_Location
    Liverpool
  • Print_ISBN
    978-1-4673-2164-8
  • Type

    conf

  • DOI
    10.1109/HPCC.2012.45
  • Filename
    6332185