DocumentCode
1826736
Title
BIST for 1149.1-compatible boards: A low-cost and maximum-flexibility solution
Author
Ferreira, Jose M M ; Gericota, Manuel G. ; Ramalho, José L. ; Alves, Gustavo R.
Author_Institution
INESC, Porto, Portugal
fYear
1993
fDate
17-21 Oct 1993
Firstpage
536
Lastpage
543
Abstract
A set of board-level testability blocks is proposed in this paper, with the aim of improving the fault coverage achievable on boards restricted to commercially available BST components. It is shown that a high flexibility and low-cost solution to board-level BIST is possible by combining an HDL-based implementation with the wide availability of medium-complexity PLDs
Keywords
automatic testing; built-in self test; design for testability; hardware description languages; logic testing; printed circuit testing; 1149.1-compatible boards; BIST; board-level testability blocks; boundary scan; fault coverage; maximum-flexibility solution; programmable logic devices; Availability; Binary search trees; Built-in self-test; Circuit faults; Circuit testing; Computer aided manufacturing; Flexible printed circuits; Hardware design languages; Packaging; Semiconductor device manufacture;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1993. Proceedings., International
Conference_Location
Baltimore, MD
Print_ISBN
0-7803-1430-1
Type
conf
DOI
10.1109/TEST.1993.470657
Filename
470657
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