FPGA implementation of an adaptive noise canceller with low signal distortion

The architecture of an adaptive noise canceller (ANC) with low signal distortion for implementation on a FPGA is discussed. The proposed ANC reduces the reverberation effect in the processed speech, by using an adaptive step size algorithm. It consists of two adaptive filters: a main filter (MF) and a sub-filter (SF). The step size for the main filter is adjusted based on the estimated input SNR by the sub filter. This paper addresses the selection of design parameters and trade-offs´ involved in real time implementation of the ANC on the FPGA obtained by Matlab simulations.