DocumentCode :
1826977
Title :
System architecture for multi-technology testbench-on-a-chip
Author :
Hodge, Angela ; Newcomb, Robert ; Zaghloul, Mona ; Tigli, Onur
Author_Institution :
Naval Res. Lab., Washington, DC, USA
Volume :
2
fYear :
2002
fDate :
2002
Abstract :
The architecture for a multi-technology testbench on a chip is presented for functional testing of mixed signal devices. The technologies tested by this system-on-a-chip (SoC) include op amps, biosensors, and smart signal processing of analog/digital multiplexers. This paper focuses on describing the architecture of the testbench on a chip as well as the results obtained from testing integral components of the fabricated device. The objective of this research is to uncover key metrology infrastructure issues needed for developing the design reuse approach for multi-technology system-on-a-chip (SoC) devices
Keywords :
array signal processing; biosensors; built-in self test; integrated circuit design; integrated circuit testing; intelligent sensors; mixed analogue-digital integrated circuits; multiplexing equipment; operational amplifiers; BIST; analog/digital multiplexers; biosensors; built in self test; design reuse; key metrology infrastructure issues; mixed signal device functional testing; multi-technology SoC devices; multi-technology testbench-on-a-chip system architecture; op amps; operational amplifiers; smart signal processing; system-on-a-chip; Application specific integrated circuits; Built-in self-test; Circuit testing; Circuits and systems; Computer architecture; Educational institutions; Integrated circuit technology; Metrology; System testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1011458
Filename :
1011458
Link To Document :
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