DocumentCode :
1827171
Title :
Design analysis and optimization of metal core BGAs for warpage
Author :
Kang, Hoshik ; Park, Jongtae ; Oh, Soohyeong
Author_Institution :
Samsung Electro-Mech. Co., Ltd., Dong, South Korea
fYear :
2011
fDate :
7-9 Dec. 2011
Firstpage :
268
Lastpage :
271
Abstract :
The increasing demands for electronic package miniaturization and better thermal management have prompted the design of thermally enhanced Ball Grid Arrays (BGAs). The ball grid array technology having the advantages of being lighter, denser, less expensive, simpler for structural design and easier to align for soldering, has been widely used in various industries. The metal core BGAs are gaining acceptance in the market for its excellent thermal conductivities. They have attractive features of better thermal performance with small footprint, which cannot be achieved with conventional BAG packages [1]. However, the coplanarity problem caused by assembling with the printed circuit board (PCB) has a significant impact on the system reliability of an electronic device, and is thus critical in package design and qualifications. The greatest concern in electronic package coplanarity is warpage, which is induced by thermal excursion during the manufacturing process. In a thin package, the coefficient of thermal expansion (CTE) mismatch between materials is primarily attributed to warpage and the plasticity of the metal core is the cause of increasing the package warpage. In this paper, firstly the accuracy of current simulation method is examined for the package warpage. Warpage of a seven layered metal core BGAs is modeled for elevated temperatures with modifying the effective material properties of epoxy molding compound (EMC) layer. Secondly, simulation based DOE analysis is performed to quantitatively study the effect of design and material impact on metal core package. Thirdly, optimal design and material optimization of the metal core BGAs is recommended based on the design of experiments (DOE) analysis for warpage improvement of package-on-package (PoP) bottom package, which is more critical for successful PoP stacking and SMT.
Keywords :
ball grid arrays; design of experiments; electronics packaging; semiconductor device reliability; thermal expansion; thermal management (packaging); BAG packages; CTE mismatch; DOE analysis; EMC layer; PCB; PoP bottom package; PoP stacking; SMT; coefficient of thermal expansion mismatch; design of experiments analysis; electronic device system reliability; electronic package coplanarity; electronic package miniaturization; epoxy molding compound layer; manufacturing process; material properties; metal core BGA material optimization; metal core plasticity; package warpage; package-on-package bottom package; printed circuit board; thermal excursion; thermal management; thermally enhanced ball grid arrays; Copper; Electromagnetic compatibility; Silicon; Strontium; US Department of Energy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th
Conference_Location :
Singapore
Print_ISBN :
978-1-4577-1983-7
Electronic_ISBN :
978-1-4577-1981-3
Type :
conf
DOI :
10.1109/EPTC.2011.6184429
Filename :
6184429
Link To Document :
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