DocumentCode
1827316
Title
Low power full search block matching motion estimation architecture
Author
Sadhu, Sai K. ; Elgamel, Mohamed A. ; Bayoumi, Magdy A. ; Mashaly, Samia
Author_Institution
Center for Adv. Comput. Studies, Univ. of Louisiana, Lafayette, LA, USA
fYear
2002
fDate
14-15 Nov. 2002
Firstpage
123
Lastpage
128
Abstract
We present an architectural enhancement to reduce the power consumption of one dimensional full-search block-matching (FSBM) motion estimation. The architecture eliminates unnecessary computations and reduces the power consumption without sacrificing the optimality and high throughput. Both the new and old architectures are compared for power consumption in order to clarify the effectiveness.
Keywords
data compression; image matching; motion estimation; parallel architectures; power consumption; video coding; linear array architecture; low power full search block matching motion estimation architecture; optimal power consumption; video compression; Cellular phones; Computer architecture; Energy consumption; Equations; Global Positioning System; Motion estimation; Personal digital assistants; Throughput; Transform coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital and Computational Video, 2002. DCV 2002. Proceedings. Third International Workshop on
Print_ISBN
0-7803-7984-5
Type
conf
DOI
10.1109/DCV.2002.1218752
Filename
1218752
Link To Document