DocumentCode :
1827595
Title :
Ultra-high selectivity TSV etching hardmask process development and integration for 3D-SIC
Author :
Guan Kian Lau ; Praveen, S.K. ; Lee, Sang-Rim ; Woon Leng Loh ; Deng Wei ; Paulasaari, J. ; Thomas, David ; Laukkanen, M. ; McLaughlin, W. ; Rantala, J.T. ; Li, Hong Yu ; Gao Shan
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
fYear :
2011
fDate :
7-9 Dec. 2011
Firstpage :
345
Lastpage :
348
Abstract :
Through Silicon Via (TSV) technology is an attractive solution for image sensor, MEMS devices, 3D stacking and others. TSV formation is one of the key processes for three dimensional stacked integrated circuit (3D-SIC). Fabrication of high aspect ratio TSV by using different hard masks such as photoresist, SiO2 and SAP100 has been discussed in this paper. Selectivity of hard masks was also presented. 2 μm diameter TSV with aspect ratio higher than 10 are etched on 200 mm wafer using deep reactive ion etching (DRIE) process. SAP100 hard mask (500Å to 700Å) was evaluated. Ultra high selectivity which is >;10,000 with respect to Si has been achieved.
Keywords :
masks; photoresists; sputter etching; three-dimensional integrated circuits; 3D-SIC; SAP100; SiO2; deep reactive ion etching process; hard mask selectivity; photoresist; size 2 mum; size 200 mm; three dimensional stacked integrated circuit; through silicon via technology; ultrahigh selectivity TSV etching hardmask process; Dry etching; Polymers; Resists; Silicon; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th
Conference_Location :
Singapore
Print_ISBN :
978-1-4577-1983-7
Electronic_ISBN :
978-1-4577-1981-3
Type :
conf
DOI :
10.1109/EPTC.2011.6184443
Filename :
6184443
Link To Document :
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