Title :
Fast-settling CMOS two-stage operational transconductance amplifiers and their systematic design
Author :
Yao, Libin ; Steyaert, Michiel ; Sansen, Willy
Author_Institution :
ESAT-MICAS, Katholieke Univ., Leuven, Belgium
Abstract :
Compared to single-stage OTAs, two-stage OTAs have higher gain and output swing, but more poles and zeros and thus have more complex settling behavior. Two structures of two-stage OTAs that have good settling performance are introduced. By analyzing the settling behavior of the third order system, a set of poles and zeros parameters are extracted. A design procedure for minimum settling time of these two OTAs is described. Finally two design examples for minimum settling time are presented. These high-speed OTAs are suitable for high-speed switched-capacitor applications
Keywords :
CMOS analogue integrated circuits; circuit optimisation; high-speed integrated circuits; integrated circuit design; operational amplifiers; poles and zeros; switched capacitor networks; 0.25 micron; Ahuja style compensated OTA; design procedure; fast-settling CMOS two-stage operational transconductance amplifiers; high-speed OTAs; high-speed switched-capacitor applications; minimum settling time; optimization procedure; poles; settling performance; systematic design; third order system; two-stage OTAs; zeros; Analog circuits; Degradation; Equivalent circuits; Frequency; Operational amplifiers; Parasitic capacitance; Poles and zeros; Transconductance; Transistors; Voltage;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1011484
