Title :
Economics modelling for the determination of test strategies for complex VLSI boards
Author :
Dislis, C. ; Dick, J.H. ; Dear, I.D. ; Azu, I.N. ; Ambler, A.P.
Author_Institution :
Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
Abstract :
This paper describes the economics modeling techniques developed by the authors for the determination of optimal test strategies for board level testing. A number of interconnected economics models are used to describe the test process and the quality achieved, enabling the user to make predictive calculations for the effects of design and test choices. The results of sample runs presented, which illustrate the potential of the system as a decision making tool
Keywords :
VLSI; economics; printed circuit testing; printed circuits; board level testing; complex VLSI boards; cost model; decision making tool; economics modeling; interconnected economics models; life cycle modelling; predictive calculations; sample runs; test strategies; Assembly; Computer aided manufacturing; Costs; Economic forecasting; Electronic equipment testing; Production; Pulp manufacturing; Very large scale integration; Virtual manufacturing; Virtual prototyping;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470700
