A standard-cell placement algorithm of optimizing multiple objects

Author

Hou, Wenting ; Hong, Xianlong ; Wu, Weimin ; Cai, Yici

Author_Institution

Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China

Volume

2

fYear

2002

fDate

2002

Abstract

Timing and congestion behavior are two important goals in performance-driven standard-cell placement. In this paper, we analyze the relationship between timing and congestion behavior. We introduce a multi-step placement algorithm to optimize the two objects. First, a timing-driven placement step is used to find the global optimal solution. In the second step, the algorithm tries to decrease the maximum congestion while not allowing the timing behavior to deteriorate. We implemented our algorithm and tested it with some real circuits. The results show that the maximum delay decreases more than 30% and the maximum congestion decreases more than 10%

Keywords

circuit layout CAD; circuit optimisation; delays; integrated circuit layout; quadratic programming; timing; congestion behavior; global optimal solution; maximum congestion decrease; maximum delay decrease; multi-step placement algorithm; multiple object optimization; standard-cell placement algorithm; timing behavior; timing-driven placement step; Circuit testing; Computer science; Cost function; Delay; Integrated circuit interconnections; Integrated circuit technology; Routing; Timing; Wire; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Conference_Location

Phoenix-Scottsdale, AZ

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1011491

Filename

1011491