Title :
Using boundary scan test to test random access memory clusters
Author :
Muris, Math ; Biewenga, Alex
Author_Institution :
Philips Electron. Design & Tools, Eindhoven, Netherlands
Abstract :
Interconnects inside clusters of random access memories on printed circuit boards can be tested using boundary scan test. This paper makes recommendations regarding the design of clusters, containing either static or dynamic memory devices, allowing for a complete structural test of the cluster. No additional access to the internal interconnects of the cluster is required. Examples of static and dynamic cluster designs are presented illustrating the recommendations
Keywords :
boundary scan testing; printed circuit accessories; printed circuit testing; random-access storage; DRAM; SRAM; boundary scan test; dynamic cluster designs; dynamic memory devices; internal interconnects; printed circuit boards; random access memory clusters; static cluster designs; static memory devices; structural test; Binary search trees; Content addressable storage; DRAM chips; Pins; Power supplies; Random access memory; Read-write memory; SRAM chips; Testing; Transceivers;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470704
