A Novel SNOS Gate-Controlled, Normally-Off p-i-n Switch

Author

Xianda Zhou ; Hao Feng ; Sin, Johnny K. O.

Author_Institution

Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China

Volume

35

Issue

1

fYear

2014

fDate

Jan. 2014

Firstpage

111

Lastpage

113

Abstract

A novel silicon-nitride-oxide-silicon (SNOS) gate-controlled, normally-off p-i-n switch (SGPINS) is proposed and experimentally demonstrated. The normally-off of the SGPINS is implemented by using a fully depleted n^--channel region that is controlled by an SNOS trench gate. The device has a threshold voltage of 7 V and an avalanche breakdown voltage of ~1000 V. ON-state voltage drop of the SGPINS is 1.7 V, and is ~0.6 V lower than that of an IGBT with the same non-punch-through structure, resulting in ~26% reduction in the conduction loss.

Keywords

semiconductor switches; silicon compounds; IGBT; SGPINS; SNOS gate-controlled normally-off p-i-n switch; SNOS trench gate; conduction loss reduction; fully depleted n^--channel region; nonpunch-through structure; silicon-nitride-oxide-silicon; voltage 1.7 V; voltage 7 V; Breakdown voltage; Dielectrics; Insulated gate bipolar transistors; Logic gates; PIN photodiodes; Silicon; Switches; normally-off; on-state voltage drop; p-i-n; silicon-nitride-oxide-silicon (SNOS); threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2013.2290029

Filename

6680615