DocumentCode :
1828471
Title :
HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV
Author :
Zatt, Bruno ; Susin, Altamiro ; Bampi, Sergio ; Agostini, Luciano
Author_Institution :
Microeletronics Groups - GME, Fed. Univ. of Rio Grande do Sul - UFRGS, Porto Alegre
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
25
Lastpage :
28
Abstract :
This work presents the HP422-MoCHA, the first published hardware architecture that implements a full compliant H.264/AVC motion compensator for high profile 4:2:2. The hardware is composed by three main modules: Motion Vector Predictor, Memory Access and Sample Interpolator. The designed architecture was described in VHDL and mapped to a Xilinx Virtex-II PRO FPGA. This architecture reaches the throughput to decode HDTV Level 4 (1080p) @ 30fps.
Keywords :
field programmable gate arrays; high definition television; motion compensation; video coding; H.264/AVC; HDTV; HP422-MoCHA; field programmable gate arrays; memory access; motion compensation; motion vector predictor; sample interpolator; Automatic voltage control; Decoding; Digital TV; Field programmable gate arrays; HDTV; Hardware; ISO; Motion compensation; Throughput; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4541345
Filename :
4541345
Link To Document :
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