• DocumentCode
    1828536
  • Title

    A HW CABAC encoder with efficient context access scheme for H.264/AVC

  • Author

    Tian, X.H. ; Le, T.M. ; Jiang, X. ; Lian, Y.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    37
  • Lastpage
    40
  • Abstract
    In this paper, we propose a hardware Context-based Binary Arithmetic Coder (CABAC) targeting the main profile of H.264/AVC standard. The encoder fully supports different coding modes including RDO coding. An efficient memory access scheme is proposed and shown to reduce context memory access rate, context memory size, and RDO context state backup and restore operation delay. Coding throughput of 1 bin/cycle is achieved by pipelined structure. The encoder is physical implemented with 362 MHz clock frequency and power reduction technique is also utilized.
  • Keywords
    binary codes; code standards; video codecs; H.264/AVC standard; HW CABAC encoder; clock frequency; hardware Context-based Binary Arithmetic Coder; memory access scheme; pipelined structure; power reduction technique; Arithmetic; Automatic voltage control; Bit rate; Code standards; Contacts; Context modeling; Delay; Hardware; Random access memory; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541348
  • Filename
    4541348