DocumentCode
1828682
Title
ESD protection of RF circuits in standard CMOS process
Author
Higashi, K. ; Adan, A.O. ; Fukumi, M. ; Tanba, N. ; Yoshimasu, T. ; Hayashi, M.
Author_Institution
Design Technol. Dev. Center, Sharp Corp., Japan
Volume
1
fYear
2002
fDate
2-7 June 2002
Firstpage
31
Abstract
The tradeoffs in the ESD protection device for RFCMOS circuits are described, and the characteristics of an SCR-based ESD structure are presented. The parasitic capacitance of the ESD structure is reduced to /spl sim/150 fF. RV HBM and 750 V CDM are achieved in a LNA working at 2.5 GHz with NF<4 dB, applicable for Bluetooth wireless transceiver.
Keywords
CMOS integrated circuits; MMIC amplifiers; UHF amplifiers; UHF integrated circuits; capacitance; electrostatic discharge; protection; thyristors; 150 fF; 2.5 GHz; 3 kV; 4 dB; 750 V; Bluetooth wireless transceiver; CMOS RFICs; ESD protection device; LNA; RFCMOS circuits; SCR-based ESD structure; parasitic capacitance; standard CMOS process; Analog integrated circuits; CMOS process; Degradation; Diodes; Electrostatic discharge; Parasitic capacitance; Protection; Radio frequency; Thyristors; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location
Seattle, WA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7239-5
Type
conf
DOI
10.1109/MWSYM.2002.1011551
Filename
1011551
Link To Document