A fully integrated 40-Gbit/s clock and data recovery circuit using InP/InGaAs HBTs

Author

Nosaka, H. ; Sano, E. ; Ishii, K. ; Ida, M. ; Kurishima, K. ; Enoki, T. ; Shibata, T.

Author_Institution

NTT Photonics Labs., NTT Corp., Kanagawa, Japan

Volume

1

fYear

2002

fDate

2-7 June 2002

Firstpage

83

Abstract

An integrated clock and data recovery (CDR) circuit is a key element for optical communication systems at 40 Gbit/s. We present a fully integrated 40-Gbit CDR circuit fabricated using InP/InGaAs HBTs. The circuit contains a linear-type phase detector and a full-data-rate voltage-controlled oscillator. Error-free operation and wide eye opening were obtained for 40-Gbit/s pseudorandom bit sequence (PRBS) with a length of 2/sup 23/-1. The fabricated IC dissipates 1.71 W at a supply voltage of -4.5 V.

Keywords

bipolar digital integrated circuits; heterojunction bipolar transistors; optical communication equipment; optical fibre communication; optical receivers; phase detectors; synchronisation; voltage-controlled oscillators; -4.5 V; 1.71 W; 40 Gbit/s; HBTs; InP-InGaAs; InP/InGaAs; clock and data recovery circuit; error-free operation; full-data-rate voltage-controlled oscillator; linear-type phase detector; optical communication systems; pseudorandom bit sequence; supply voltage; wide eye opening; Circuits; Clocks; Detectors; Error-free operation; Indium gallium arsenide; Indium phosphide; Optical fiber communication; Phase detection; Voltage; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 2002 IEEE MTT-S International

Conference_Location

Seattle, WA, USA

ISSN

0149-645X

Print_ISBN

0-7803-7239-5

Type

conf

DOI

10.1109/MWSYM.2002.1011564

Filename

1011564