DocumentCode
1829072
Title
Automated synthesis of a high speed Cordic algorithm with the Cathedral-III compilation system
Author
Note, Stefaan ; Van Meerbergen, Jef ; Catthoor, Francky ; De Man, Hugo
Author_Institution
IMEC Lab., Leuven, Belgium
fYear
1988
fDate
7-9 June 1988
Firstpage
581
Abstract
The automated design methodology of the Cathedral-III system is presented. The Cathedral-III system is an environment for efficient synthesis of high-throughput digital-signal-processing circuits. The system translates a behavioral description, expressed in the Silage language, into an intermediate signal flow graph representation, which is assembled and optimized into a dedicated bit-sliced architecture. The Cordic algorithm is used as test-vehicle to demonstrate the features of the Cathedral-III methodology.<>
Keywords
circuit layout CAD; digital signal processing chips; Cathedral-III compilation system; Silage language; automated design methodology; dedicated bit-sliced architecture; digital-signal-processing circuits; high speed Cordic algorithm; intermediate signal flow graph representation; Automatic testing; Circuit synthesis; Circuit testing; Design methodology; Digital signal processing; Equations; Flow graphs; Signal processing algorithms; Signal synthesis; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.14993
Filename
14993
Link To Document