DocumentCode
1829248
Title
Transistor-level programmable MOS analog IC with body biasing
Author
Fujimura, Toru ; Nakatake, Shigetoshi
Author_Institution
Sch. of Environ. Eng., Univ. of Kitakyushu, Fukuoka
fYear
2008
fDate
18-21 May 2008
Firstpage
153
Lastpage
156
Abstract
This paper aims at developing a transistor-level programmable technology which is composed of two key mechanisms; One is that a MOS transistor is divided into sub-transistors connected in parallel, so that the transistor behaves various characteristics by switching the parallel connection. The other mechanism changes Vth and gm of the transistor by adjusting the bulk potential based on body effect. These mechanisms are combined and embedded into an opamp circuit. In the post-layout simulation, the results showed our mechanisms could tune the circuit performance such as the gain continuously as well as over a wide range.
Keywords
MOS analogue integrated circuits; programmable circuits; transistors; MOS analog IC; body biasing; opamp circuit; transistor-level programmable technology; Analog integrated circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541377
Filename
4541377
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