V-Set Cache Design for LLC of Multi-core Processors

With the increase in the number of the cores integrated in the single-chip microprocessor, the design of an efficient shared Last-Level-Cache (LLC) becomes more critical to the microprocessor performance. In this paper the author proposes v-set cache design for LLC for multi-core microprocessors. The proposed design has the ability to cope with the variation in the set access pattern to reduce the conflict misses and at the same time take the advantage of accessing multiple cache blocks simultaneously for fast cache search of the set-associative LLC. On four-core microprocessor, newly proposed LLC design compared to conventional n-way set-associative cache and v-way cache achieves maximum speedup of 20% and 10%, and average speedup of 8% and 6% respectively.