DocumentCode :
1829352
Title :
Ariadne-an adaptive router for fault-tolerant multicomputers
Author :
Allen, James D. ; Gaughan, Patrick T. ; Schimmel, David E. ; Yalamanchili, Sudhakar
Author_Institution :
Comput. Syst. Res. Lab., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
1994
fDate :
18-21 Apr 1994
Firstpage :
278
Lastpage :
288
Abstract :
Adaptive routing has been proposed as a means of improving performance and fault-tolerance in multicomputer networks. While a number of algorithms have been proposed, few adaptive routers have been implemented in hardware. This paper presents the design and implementation of Ariadne-a prototype single chip, hardware router. The primary motivation is tolerance to link and router failures, while reconciling conflicting demands on performance. This is achieved by implementing the m-misroute backtracking protocol (MB-m) using the pipelined circuit-switching communication mechanism. Ariadne implements two virtual data channels and one virtual control channel per physical link. The router is self-timed with single flit buffering at the input and output ports, and is fully adaptive
Keywords :
circuit switching; computer networks; fault tolerant computing; microprocessor chips; multiprocessor interconnection networks; network routing; protocols; telecommunication network routing; Ariadne; MB-m; adaptive router; fault-tolerant multicomputers; m-misroute backtracking protocol; multicomputer networks; pipelined circuit switching; virtual control channel; virtual data channels; Communication switching; Computer networks; Delay; Fault tolerance; Fault tolerant systems; Hardware; Laboratories; Parallel architectures; Routing protocols; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 1994., Proceedings the 21st Annual International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-8186-5510-0
Type :
conf
DOI :
10.1109/ISCA.1994.288142
Filename :
288142
Link To Document :
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