• DocumentCode
    18294
  • Title

    Frequency Synthesizer With Dual Loop Frequency and Gain Calibration

  • Author

    Jakobsson, Andreas ; Grewing, Christian ; Serban, Adriana ; Shaofang Gong

  • Author_Institution
    Huawei Technol. Sweden AB, Kista, Sweden
  • Volume
    60
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    2911
  • Lastpage
    2919
  • Abstract
    A 3600-MHz phase-locked loop based frequency synthesizer for UMTS applications has been developed in 0.18 μm CMOS. It incorporates a VCO frequency and loop-gain calibration technique that allows an integrated VCO frequency tuning range of 28% and a low VCO gain ( KVCO of 30 MHz/V. The loop-gain calibration can compensate for not only variations in VCO gain and divider modulus, but also charge-pump current and loop filter capacitance to an accuracy of 5%. The PLL settles in 150 μs including frequency and gain calibrations. No switches are used in the loop filter. The output phase noise at 1-MHz offset is -123 dBc/Hz and the integrated phase error (1 kHz-2 MHz) is 1.26 °.
  • Keywords
    3G mobile communication; CMOS integrated circuits; PI control; calibration; charge pump circuits; frequency synthesizers; phase locked loops; voltage-controlled oscillators; UMTS applications; VCO frequency; charge pump current; dual loop frequency; frequency 1 MHz; frequency calibrations; frequency synthesizer; gain calibrations; loop filter capacitance; loop gain calibration technique; phase locked loop; size 0.18 mum; time 150 mus; Calibration; Charge pumps; Frequency conversion; Frequency synthesizers; Phase locked loops; Tuning; Voltage-controlled oscillators; Automatic frequency calibration; automatic gain calibration; bang-bang phase detector; frequency synthesizer; phase-locked loop;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2013.2256191
  • Filename
    6605588