Bilateral design of mm-wave LNA and receiver front-end in 90nm CMOS

This paper describes design of a 79 GHz receiver front-end with emphasis on simultaneous noise and power matching of mm-wave bilateral LNA in CMOS technologies. The LNA is a pseudo-differential three stage common source amplifier to accommodate the low breakdown voltage of deep submicron devices. Optimization based on maximum available gain, minimum noise figure and matching network losses is presented. An efficient Smith chart based technique is introduced to simplify the design with a finite reverse isolation. A Gilbert-type down-conversion mixer and an IF amplifier complete the receiver. Simulations predict a conversion gain of 27 dB and a noise figure of 9.4 dB while consuming 54.4 mW from a 1 V supply in 90 nm CMOS.