DocumentCode
1829614
Title
A new methodology for the computation of the substrate parasitics of octagonal inductors
Author
Tatinian, W. ; Pannier, P. ; Gillon, R.
Author_Institution
L2MP-ICF, IMT Technopole de Chateau Gombert, Marseille, France
Volume
1
fYear
2002
fDate
2-7 June 2002
Firstpage
165
Abstract
The paper provides a method for the computation of the substrate parasitics of symmetrical octagonal inductor., using a set of equivalent structures. This method has been tested on a wide range of inductors and the error due to computation is lower than the one due to the topology of the model itself.
Keywords
CMOS integrated circuits; MMIC; UHF integrated circuits; capacitance; equivalent circuits; inductors; modelling; silicon; substrates; CMOS technology; Si; equivalent structures; substrate parasitics; symmetrical octagonal inductor; Capacitance; Frequency; Inductance; Inductors; Microelectronics; Protection; Q factor; Silicon; Testing; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location
Seattle, WA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7239-5
Type
conf
DOI
10.1109/MWSYM.2002.1011585
Filename
1011585
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