DocumentCode :
1829873
Title :
A fault-tolerant, DFA-resistant AES core
Author :
Moratelli, Carlos ; Ghellar, Felipe ; Cota, Erika ; Lubaszewski, Marcelo
Author_Institution :
Comput. Sci. Dept., Fed. Univ. of Rio Grande do Sul Porto Alegre, Porto Alegre
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
244
Lastpage :
247
Abstract :
In this work we analyze four techniques to protect a cryptographic core, which can be combined to allow for several implementations with different area overheads and protection levels. Experimental results show their efficiency in protecting the core against fault attacks, while being flexible enough to leave other design aspects to be explored by the core provider.
Keywords :
combinational circuits; cryptography; fault tolerance; DFA-resistant AES core; advance encryption standard; area overheads; combinational circuits; cryptographic core; fault tolerance; protection levels; Circuit faults; Clocks; Computer science; Cryptography; Doped fiber amplifiers; Fault detection; Fault tolerance; Hardware; Protection; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4541400
Filename :
4541400
Link To Document :
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