DocumentCode :
1829975
Title :
Extraction of transceiver die pin capacitance using S-parameter de-embedding technique with distributed circuit modeling
Author :
Chyuan, Lai Lip ; Ngik, Low Hoon ; Shi, Hong
Author_Institution :
Altera Corp. (M) Sdn Bhd, Medan Bayan Lepas, Malaysia
fYear :
2011
fDate :
7-9 Dec. 2011
Firstpage :
798
Lastpage :
801
Abstract :
This paper discusses the characterization of bare die transceivers capacitance using return loss measurement from Vector Network Analyzer. The die transceivers capacitance is extracted from the return loss measurement using de-embedding techniques with distributed circuit modeling. An equivalent distributed circuit of the transceiver was modeled and the simulation results of the model were compared with the extracted measurement results. The die pin capacitance was then extracted based on measurements and simulated results.
Keywords :
S-parameters; capacitance; equivalent circuits; integrated circuit modelling; transceivers; S-parameter deembedding technique; bare die transceivers capacitance characterization; distributed circuit modeling; equivalent distributed circuit; return loss measurement; transceiver die pin capacitance extraction; vector network analyzer; Capacitance; Integrated circuit modeling; Loss measurement; Semiconductor device measurement; Transceivers; Transmission line measurements; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th
Conference_Location :
Singapore
Print_ISBN :
978-1-4577-1983-7
Electronic_ISBN :
978-1-4577-1981-3
Type :
conf
DOI :
10.1109/EPTC.2011.6184537
Filename :
6184537
Link To Document :
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