Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC

Presented in this paper is an energy-efficient and variation-tolerant PN-code acquisition architecture for the wireless CDMA2000 standard. The architectures is based on the recently proposed stochastic sensor network-on-chip (SSNOC) computational paradigm. The latter employs the principles of statistically similar decomposition and robust estimation theory to compensate for timing errors due to process variations. Performance of the SSNOC-based PN-code acquisition architecture at the slow process corner indicates that the average probability of detection P_Det improves by up to 3 orders-of-magnitude over that of the conventional architecture, while the variation in P_Det(sigma / mu) is reduced by up to 2 orders-of-magnitude over that of the conventional architecture while simultaneously achieving a power reduction of 39%.