DocumentCode
1830733
Title
Integrated quadrupler circuit in coplanar technology for 60 GHz wireless applications
Author
Schefer, M.
Author_Institution
Wireless Semicond. Div., Agilent Technol., Santa Clara, CA, USA
Volume
1
fYear
2002
fDate
2-7 June 2002
Firstpage
355
Abstract
This paper describes the design, the simulation and the measured results of a frequency quadrupler (/spl times/4 multiplier) circuit for mm-wave applications. The coplanar circuit was designed in a balanced configuration which makes it extremely small in area while maintaining excellent performance. A large number of circuits from several wafers were measured. The conversion loss is 4 dB and the harmonic suppression >20 dB with 6 dBm input power.
Keywords
frequency multipliers; millimetre wave frequency convertors; millimetre wave integrated circuits; 4 dB; 60 GHz; MM-wave wireless applications; balanced configuration; conversion loss; coplanar technology; frequency quadrupler integrated circuit; harmonic suppression; Bandwidth; FETs; Frequency conversion; HEMTs; Hidden Markov models; Integrated circuit technology; Oscillators; Paper technology; Phase noise; Power harmonic filters;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location
Seattle, WA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7239-5
Type
conf
DOI
10.1109/MWSYM.2002.1011629
Filename
1011629
Link To Document