Title :
An Analysis of the Impact of Bus Contention on the WCET in Multicores
Author :
Dasari, Dakshina ; Nelis, Vincent
Author_Institution :
CISTER-ISEP Res. Centre, Polytech. Inst. of Porto, Porto, Portugal
Abstract :
The use of multicores is becoming widespread in the field of embedded systems, many of which have real-time requirements. Hence, ensuring that real-time applications meet their timing constraints is a pre-requisite before deploying them on these systems. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources like the front-side bus (FSB) on the Worst-Case Execution Time (WCET) of the tasks. Towards this aim, this paper proposes a method to determine an upper bound on the number of bus requests that tasks executing on a core can generate in a given time interval. We show that our method yields tighter upper bounds in comparison with the state-of-the-art. We then apply our method to compute the extra contention delay incurred by tasks, when they are co-scheduled on different cores and access the shared main memory, using a shared bus, access to which is granted using a round-robin arbitration (RR) protocol.
Keywords :
delays; embedded systems; field buses; resource allocation; shared memory systems; FSB; RR protocol; Round Robin arbitration protocol; WCET; bus contention impact analysis; contention delay; embedded systems; front-side bus; low-level hardware resource sharing; multicores; real-time applications; shared memory access; task execution; timing constraints; upper bound; worst-case execution time; Embedded systems; Hardware; Multicore processing; Program processors; Schedules; Timing; Upper bound;
Conference_Titel :
High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
Conference_Location :
Liverpool
Print_ISBN :
978-1-4673-2164-8
DOI :
10.1109/HPCC.2012.212