DocumentCode :
1831147
Title :
Novel VLSI implementation of Peano-Hilbert curve address generator
Author :
Wang, Yan ; Chen, Shoushun ; Bermak, Amine
Author_Institution :
Electron. & Comput. Eng. Dept., Hong Kong Univ. of Sci. & Technol., Hong Kong
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
476
Lastpage :
479
Abstract :
This paper presents a fast algorithm for generating Hilbert address for hardware implementation with low storage requirement. This work avoids the use of recursive functions as compared with Quinqueton´s work, and eliminates complicated bit manipulations as proposed by Butz, and does not use any look-up-tables as implemented by Kamata. Each address can be obtained in one clock cycle by one-to-one mapping using a simple incremental counter and cascading of multiplexers. The merit of our method is that it achieves very high speed when computing the Hilbert address which requires little memory storage.
Keywords :
Hilbert spaces; VLSI; counting circuits; Peano-Hilbert curve address generator; VLSI implementation; incremental counter; low storage requirement; multiplexers cascading; one-to-one mapping; recursive functions; Canning; Clocks; Counting circuits; Hardware; Hilbert space; Image analysis; Image resolution; Multiplexing; Prototypes; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4541458
Filename :
4541458
Link To Document :
بازگشت