DocumentCode :
1831336
Title :
Address-Locking Cache: A Flexible on Chip Memory Implementation for Embedded System
Author :
Su, Wen ; Wang, Jing ; Zhang, Longbing ; Chen, Xinke
Author_Institution :
Key Lab. of Comput. Syst. & Archit., Beijing, China
fYear :
2012
fDate :
25-27 June 2012
Firstpage :
1516
Lastpage :
1519
Abstract :
The fast development of mobile devices and commercial electronics brings new challenges to embedded system designers. Meanwhile, on-chip memory in modern embedded systems still not fulfills the needs of applications. In this paper, firstly we review two typical on-chip memory models - cache and scratch pad memory and show their disadvantages. Then we propose an improved cache model called address-locking cache, which supports an innovative cache locking mechanism with high efficiency. It provides flexibility to different applications and overcomes limitations of conventional memory models. Experimental results show that our solution improves the cache hit rate by 20%, and the benefits keep constant with data size increasing. Also some conclusions about cache locking are given.
Keywords :
cache storage; embedded systems; flexible electronics; mobile computing; address-locking cache; cache memory; commercial electronics; embedded system; flexible on-chip memory implementation; innovative cache locking mechanism; mobile devices; scratch pad memory; Embedded systems; Indexes; Memory management; Random access memory; Registers; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
Conference_Location :
Liverpool
Print_ISBN :
978-1-4673-2164-8
Type :
conf
DOI :
10.1109/HPCC.2012.221
Filename :
6332357
Link To Document :
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