DocumentCode :
1831476
Title :
A high performance pattern associative oblivious router for tree topologies
Author :
Summerville, Douglas H. ; Delgado-Frias, Jose G. ; Vassiliadis, Stamatis
Author_Institution :
Dept. of Electr. Eng., State Univ. of New York, Binghamton, NY, USA
fYear :
1994
fDate :
26-29 Apr 1994
Firstpage :
541
Lastpage :
545
Abstract :
Presents a novel approach to execute implicit routing algorithms. The proposed router is based on an associative scheme that uses the attributes of the routing algorithm and the network topology. This router allows implicit oblivious routing algorithms to be mapped onto a set of bit patterns that are matched in parallel. In order to show the applicability of this router, the authors have selected a number of tree interconnection topologies. For the studied tree topologies the number of required bit patterns is of the same order as the topology degree. The proposed organization requires only one comparison and one read delay
Keywords :
multiprocessor interconnection networks; network topology; trees (mathematics); high performance; network topology; oblivious router; pattern associative; routing algorithms; tree interconnection topologies; tree topologies; Delay; Hardware; Large-scale systems; Multiprocessor interconnection networks; Network topology; Parallel algorithms; Parallel machines; Pattern matching; Routing; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1994. Proceedings., Eighth International
Conference_Location :
Cancun
Print_ISBN :
0-8186-5602-6
Type :
conf
DOI :
10.1109/IPPS.1994.288251
Filename :
288251
Link To Document :
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