Title :
Advances in packaging technologies for electronics to 500°C
Author :
Grzbybowsky, Richard R.
Author_Institution :
United Technol. Res. Center, East Hartford, CT, USA
Abstract :
Summary form only given, as follows. Advances in silicon-on-insulator (SOI) integrated circuit technology and the steady development of wider band gap semiconductors like silicon carbide are enabling the practical deployment of high temperature electronics. In addition, while integrated circuits are key to the realization of complete high temperature electronic systems, passive components including resistors, capacitors, magnetics and crystals are also required. Electronic components from all of these categories exist, in varying degrees, for temperatures up to 500°C. However, one of the greatest hindrances to making individual components more reliable is the approach used to package them. Similarly, one of the greatest hindrances to integrating individual components together into a system is the understanding of harsh environment packaging techniques and materials selection. This paper addresses the issue of electronics packaging for harsh environment applications for a variety of packaging levels. The paper looks at the common failure mechanisms associated with packaging microcircuits at the integrated circuit die level as well as packaging means for individual passive components. With these failure mechanisms identified, we consider alternative materials selection choices and fabrication approaches that will permit electronic systems to be packaged for much higher temperature operating environments than are generally possible with traditional methods. Also examined are packaging options at the printed wiring board level, including high temperature substrate materials, interconnect metallization, solders and braze materials
Keywords :
failure analysis; integrated circuit interconnections; integrated circuit packaging; metallisation; packaging; printed circuits; reliability; soldering; 500 C; braze materials; fabrication approaches; failure mechanisms; harsh environment applications; high temperature electronics; high temperature substrate materials; integrated circuit die level; interconnect metallization; materials selection; packaging technologies; passive components; printed wiring board level; solders; Electronics packaging; Failure analysis; Inorganic materials; Integrated circuit packaging; Integrated circuit technology; Photonic band gap; Semiconductor device packaging; Silicon carbide; Silicon on insulator technology; Temperature;
Conference_Titel :
Integrated Power Packaging, 1998. IWIPP. Proceedings., IEEE International Workshop on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-5033-2
DOI :
10.1109/IWIPP.1998.722240