DocumentCode
183158
Title
A 94GHz duobinary keying wireless transceiver in 65nm CMOS
Author
Yu-Lun Chen ; Chiro Kao ; Pen-Jui Peng ; Jri Lee
Author_Institution
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2014
fDate
10-13 June 2014
Firstpage
1
Lastpage
2
Abstract
This work introduces a 94GHz duobinary keying wireless transceiver for point-to-point communications. It presents bandwidth efficiency twice as much as an OOK system and requires no carrier recovery and baseband circuitry to reduce power consumption. Designed and fabricated in 65nm CMOS, the transceiver achieves a 2.0-Gb/s data link with BER <; 10-9 while consuming a total power of 265mW.
Keywords
CMOS integrated circuits; field effect MIMIC; integrated circuit design; radio transceivers; CMOS process; OOK system; bandwidth efficiency; bit rate 2.0 Gbit/s; duobinary keying wireless transceiver; frequency 94 GHz; point-to-point communications; power 265 mW; power consumption reduction; size 65 nm; Attenuators; Bandwidth; Bit error rate; CMOS integrated circuits; Modulation; Transceivers; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits Digest of Technical Papers, 2014 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4799-3327-3
Type
conf
DOI
10.1109/VLSIC.2014.6858417
Filename
6858417
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