DocumentCode :
1832135
Title :
Low-power programmable divider for multi-standard frequency synthesizers using reset and modulus signal generator
Author :
Kim, Kyu-Young ; Lee, Woo-Kwan ; Kim, Hoonki ; Kim, Soo-Won
Author_Institution :
Dept. of Electron. & Comput. Eng., Korea Univ., Seoul
fYear :
2008
fDate :
3-5 Nov. 2008
Firstpage :
77
Lastpage :
80
Abstract :
This paper proposes a low-power programmable divider for multi-standard frequency synthesizers using a reset and modulus control signal (RMS) generator. The use of RMS generator enables the adaptation of only one counter. This results in less power consumption and effective area. Our design also includes modified D flip-flop design. Proposed divider was designed and fabricated in a standard 0.18-mum CMOS technology Its divide ratio covers from 13 to 1278 at 3 GHz. The average power is 3.58 mW with 1.5 V power supply and effective area is 0.0408 mm2.
Keywords :
CMOS integrated circuits; flip-flops; frequency dividers; frequency synthesizers; CMOS technology; frequency 3 GHz; low-power programmable divider; modified D flip-flop design; modulus control signal generator; multistandard frequency synthesizers; power 3.58 mW; power consumption; power supply; size 0.18 micron; voltage 1.5 V; Clocks; Counting circuits; Energy consumption; Flip-flops; Frequency conversion; Frequency synthesizers; Phase frequency detector; Phase locked loops; Signal generators; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian
Conference_Location :
Fukuoka
Print_ISBN :
978-1-4244-2604-1
Electronic_ISBN :
978-1-4244-2605-8
Type :
conf
DOI :
10.1109/ASSCC.2008.4708733
Filename :
4708733
Link To Document :
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