• DocumentCode
    183220
  • Title

    92% start-up time reduction by variation-tolerant chirp injection (CI) and negative resistance booster (NRB) in 39MHz crystal oscillator

  • Author

    Iguchi, Shoji ; Fuketa, Hiroshi ; Sakurai, Takayasu ; Takamiya, Makoto

  • Author_Institution
    Univ. of Tokyo, Tokyo, Japan
  • fYear
    2014
  • fDate
    10-13 June 2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    To reduce the start-up time of a crystal oscillator (XO), a chirp injection (CI) and a negative resistance booster (NRB) are proposed. By combining CI and NRB, the measured start-up time of a 39-MHz XO in 180-nm CMOS is reduced by 92% from 2.1ms to 158μs, which is the shortest time in the published XO´s. The measured start-up time variations due to the ±20% supply voltage change or the temperature change are less than 13%.
  • Keywords
    CMOS analogue integrated circuits; crystal oscillators; CI; CMOS process; NRB; XO; crystal oscillator; frequency 39 MHz; negative resistance booster; size 180 nm; start-up time reduction; time 2.1 ms to 158 mus; variation-tolerant chirp injection; Chirp; Crystals; Logic gates; Radio frequency; Resistance; Temperature measurement; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits Digest of Technical Papers, 2014 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4799-3327-3
  • Type

    conf

  • DOI
    10.1109/VLSIC.2014.6858449
  • Filename
    6858449