Evaluation of Visual Aid Enhancement Algorithms for Real-time Embedded Systems

Individuals with visual impairments often suffer from a loss of visual sensitivity to high spatial frequencies that cannot be effectively treated by traditional methods. Recent developments in digital image processing technologies have allowed new and effective visual enhancement techniques to be investigated resulting in augmented visual aid. Edge detection, a digital image processing technique, has become a critical stage in enhancing the visually lost high spatial frequency components for the visually impaired. Visual aid devices require effective and efficient implementation of edge detection for use within real-time embedded platforms. This paper evaluates multiple edge detection algorithms of various complexity realized within a 6416 DSP and a Virtex-5 FPGA. In addition, the mathematically complex Statistical edge detection technique is presented and optimized for use within embedded devices. The optimized FPGA realization demonstrates throughput improvements of 137.66% and is comparable to a FPGA implemented Canny edge detection throughput and resources.